This invention relates to Flash Electrically-Programmable Erasable Read-Only-Memories (Flash EPROMs). In particular, this invention relates to a sense amplifier for use in Flash EPROMs designed to improve the speed of operation when used with either a 3 V or a 5 V supply.
Flash EPROMs are generally described in U.S. Pat. application Ser. No. 08/315,526 filed Sep. 30, 1994, entitled "FLASH EPROM CONTROL WITH EMBEDDED PULSE TIMER AND WITH BUILT-IN SIGNATURE ANALYSIS", also assigned to Texas Instruments Incorporated. That Patent Application is hereby incorporated herein.
An example sense amplifier is described in U.S. Pat. No. 5,056,063 issued Oct. 18, 1991 and assigned to Texas Instruments Incorporated. A sense amplifier bias circuit is described in U.S. Pat. No. 5,132,933 issued Jul. 21, 1992, also assigned to Texas Instruments Incorporated.
In a high-density Flash EPROM designed for use with either a 3 V or a 5 V supply voltage, a prior-art sense amplifier designed for use with a 5 V supply does not operate correctly when the device operates using a 3 V supply. There is a need for an improved sense amplifier that allows a Flash EPROM to operate in the lower voltage range and that improves speed of operation in both the approximately 5 V range and the approximately 3 V range of supply voltages.